Siemens QDCL S30810-Q2113-X000-04 Refurbished
Refurbished
S30810-Q2113-X000-04
The QDCL card (Quad Data Communication Link) provides the interface between the periphery and the central data processor DP (either DP4L or DM3L) in the 350 E system.
The QDCL serves 16 bidirectional HDLC links (15 LTU + 1 SICOE). The communication interface to the DP is realized with a Dual Port RAM external (DPRe), which allows independent and asynchronous access from the DP via Multibus and from inside the QDCL via Local Bus.
This concept results in a partition of the QDCL board into one part which processes the Multibus interface ( = Central Message Processor CMP) and a second part which processes the HDLC interface to the peripherals ( = Line Processor LP). The two processors (CMP and LP) communicate via a Dual Port RAM internal (DPRi)